Optimized ASIP Synthesis from Architecture Description Language Models

Optimized ASIP Synthesis from Architecture Description Language Models
Author: Oliver Schliebusch,Heinrich Meyr,Rainer Leupers
Publsiher: Springer Science & Business Media
Total Pages: 194
Release: 2007-04-27
Genre: Technology & Engineering
ISBN: 9781402056864

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New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and compares it to common implementation practice. It provides case-studies that emphasize that neither the architectural advantages nor the design space of ASIPs are sacrificed for an automated implementation.

C Compilers for ASIPs

C Compilers for ASIPs
Author: Manuel Hohenauer,Rainer Leupers
Publsiher: Springer Science & Business Media
Total Pages: 223
Release: 2009-10-13
Genre: Technology & Engineering
ISBN: 9781441911766

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This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model.

Encyclopedia of Information Science and Technology Third Edition

Encyclopedia of Information Science and Technology  Third Edition
Author: Khosrow-Pour, Mehdi
Publsiher: IGI Global
Total Pages: 10384
Release: 2014-07-31
Genre: Computers
ISBN: 9781466658899

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"This 10-volume compilation of authoritative, research-based articles contributed by thousands of researchers and experts from all over the world emphasized modern issues and the presentation of potential opportunities, prospective solutions, and future directions in the field of information science and technology"--Provided by publisher.

Application Analysis Tools for ASIP Design

Application Analysis Tools for ASIP Design
Author: Kingshuk Karuri,Rainer Leupers
Publsiher: Springer Science & Business Media
Total Pages: 232
Release: 2011-06-15
Genre: Technology & Engineering
ISBN: 9781441982551

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This book introduces a novel design methodology which can significantly reduce the ASIP development effort through high degrees of design automation. The key elements of this new design methodology are a powerful application profiler and an automated instruction-set customization tool which considerably lighten the burden of mapping a target application to an ASIP architecture in the initial design stages. The book includes several design case studies with real life embedded applications to demonstrate how the methodology and the tools can be used in practice for accelerating the overall ASIP design process.

Innovations in Embedded and Real Time Systems Engineering for Communication

Innovations in Embedded and Real Time Systems Engineering for Communication
Author: Virtanen, Seppo
Publsiher: IGI Global
Total Pages: 377
Release: 2012-04-30
Genre: Computers
ISBN: 9781466609136

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"This book has collected the latest research within the field of real-time systems engineering, and will serve as a vital reference compendium for practitioners and academics"--Provided by publisher.

Ultra Low Energy Domain Specific Instruction Set Processors

Ultra Low Energy Domain Specific Instruction Set Processors
Author: Francky Catthoor,Praveen Raghavan,Andy Lambrechts,Murali Jayapala,Angeliki Kritikakou,Javed Absar
Publsiher: Springer Science & Business Media
Total Pages: 406
Release: 2010-08-05
Genre: Technology & Engineering
ISBN: 9789048195282

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Modern consumers carry many electronic devices, like a mobile phone, digital camera, GPS, PDA and an MP3 player. The functionality of each of these devices has gone through an important evolution over recent years, with a steep increase in both the number of features as in the quality of the services that they provide. However, providing the required compute power to support (an uncompromised combination of) all this functionality is highly non-trivial. Designing processors that meet the demanding requirements of future mobile devices requires the optimization of the embedded system in general and of the embedded processors in particular, as they should strike the correct balance between flexibility, energy efficiency and performance. In general, a designer will try to minimize the energy consumption (as far as needed) for a given performance, with a sufficient flexibility. However, achieving this goal is already complex when looking at the processor in isolation, but, in reality, the processor is a single component in a more complex system. In order to design such complex system successfully, critical decisions during the design of each individual component should take into account effect on the other parts, with a clear goal to move to a global Pareto optimum in the complete multi-dimensional exploration space. In the complex, global design of battery-operated embedded systems, the focus of Ultra-Low Energy Domain-Specific Instruction-Set Processors is on the energy-aware architecture exploration of domain-specific instruction-set processors and the co-optimization of the datapath architecture, foreground memory, and instruction memory organisation with a link to the required mapping techniques or compiler steps at the early stages of the design. By performing an extensive energy breakdown experiment for a complete embedded platform, both energy and performance bottlenecks have been identified, together with the important relations between the different components. Based on this knowledge, architecture extensions are proposed for all the bottlenecks.

Applied Reconfigurable Computing

Applied Reconfigurable Computing
Author: Vanderlei Bonato,Christos Bouganis,Marek Gorgon
Publsiher: Springer
Total Pages: 370
Release: 2016-03-15
Genre: Computers
ISBN: 9783319304816

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This book constitutes the refereed proceedings of the 12th International Symposium on Applied Reconfigurable Computing, ARC 2016, held in Rio de Janeiro, Brazil, in March 2016. The 20 full papers presented in this volume were carefully reviewed and selected from 47 submissions. They are organized in topical headings named: video and image processing; fault-tolerant systems; tools and architectures; signal processing; and multicore systems. In addition, the book contains 3 invited papers and 8 poster papers on funded RD running and completed projects.

Code Optimization Techniques for Embedded Processors

Code Optimization Techniques for Embedded Processors
Author: Rainer Leupers
Publsiher: Springer Science & Business Media
Total Pages: 218
Release: 2013-03-09
Genre: Computers
ISBN: 9781475731699

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The building blocks of today's and future embedded systems are complex intellectual property components, or cores, many of which are programmable processors. Traditionally, these embedded processors mostly have been pro grammed in assembly languages due to efficiency reasons. This implies time consuming programming, extensive debugging, and low code portability. The requirements of short time-to-market and dependability of embedded systems are obviously much better met by using high-level language (e.g. C) compil ers instead of assembly. However, the use of C compilers frequently incurs a code quality overhead as compared to manually written assembly programs. Due to the need for efficient embedded systems, this overhead must be very low in order to make compilers useful in practice. In turn, this requires new compiler techniques that take the specific constraints in embedded system de sign into account. An example are the specialized architectures of recent DSP and multimedia processors, which are not yet sufficiently exploited by existing compilers.