A Problem Oriented Approach For Dynamic Verification Of Heterogeneous Embedded Systems

This work presents a virtual prototyping methodology for the design and verification of industrial devices in the field level of industrial automation systems. This work demonstrates that virtual prototypes can help increase the confidence in the correctness of a design thanks to a deeper understanding of the complex interactions between hardware, software, analog and mixed-signal components of embedded systems and the physical processes they interact with.

This work presents a virtual prototyping methodology for the design and verification of industrial devices in the field level of industrial automation systems. This work demonstrates that virtual prototypes can help increase the confidence in the correctness of a design thanks to a deeper understanding of the complex interactions between hardware, software, analog and mixed-signal components of embedded systems and the physical processes they interact with. This work was published by Saint Philip Street Press pursuant to a Creative Commons license permitting commercial use. All rights not granted by the work's license are retained by the author or authors.

Modern embedded systems require high performance, low cost and low power consumption. Such systems typically consist of a heterogeneous collection of processors, specialized memory subsystems, and partially programmable or fixed-function components. This heterogeneity, coupled with issues such as hardware/software partitioning, mapping, scheduling, etc., leads to a large number of design possibilities, making performance debugging and validation of such systems a difficult problem. Embedded systems are used to control safety critical applications such as flight control, automotive electronics and healthcare monitoring. Clearly, developing reliable software/systems for such applications is of utmost importance. This book describes a host of debugging and verification methods which can help to achieve this goal. Covers the major abstraction levels of embedded systems design, starting from software analysis and micro-architectural modeling, to modeling of resource sharing and communication at the system level Integrates formal techniques of validation for hardware/software with debugging and validation of embedded system design flows Includes practical case studies to answer the questions: does a design meet its requirements, if not, then which parts of the system are responsible for the violation, and once they are identified, then how should the design be suitably modified?

Design technology to address the new and vast problem of heterogeneous embedded systems design while remaining compatible with standard “More Moore” flows, i.e. capable of simultaneously handling both silicon complexity and system complexity, represents one of the most important challenges facing the semiconductor industry today and will be for several years to come. While the micro-electronics industry, over the years and with its spectacular and unique evolution, has built its own specific design methods to focus mainly on the management of complexity through the establishment of abstraction levels, the emergence of device heterogeneity requires new approaches enabling the satisfactory design of physically heterogeneous embedded systems for the widespread deployment of such systems. Heterogeneous Embedded Systems, compiled largely from a set of contributions from participants of past editions of the Winter School on Heterogeneous Embedded Systems Design Technology (FETCH), proposes a necessarily broad and holistic overview of design techniques used to tackle the various facets of heterogeneity in terms of technology and opportunities at the physical level, signal representations and different abstraction levels, architectures and components based on hardware and software, in all the main phases of design (modeling, validation with multiple models of computation, synthesis and optimization). It concentrates on the specific issues at the interfaces, and is divided into two main parts. The first part examines mainly theoretical issues and focuses on the modeling, validation and design techniques themselves. The second part illustrates the use of these methods in various design contexts at the forefront of new technology and architectural developments.

The demands of increasingly complex embedded systems and associated performance computations have resulted in the development of heterogeneous computing architectures that often integrate several types of processors, analog and digital electronic components, and mechanical and optical components—all on a single chip. As a result, now the most prominent challenge for the design automation community is to efficiently plan for such heterogeneity and to fully exploit its capabilities. A compilation of work from internationally renowned authors, Model-Based Design for Embedded Systems elaborates on related practices and addresses the main facets of heterogeneous model-based design for embedded systems, including the current state of the art, important challenges, and the latest trends. Focusing on computational models as the core design artifact, this book presents the cutting-edge results that have helped establish model-based design and continue to expand its parameters. The book is organized into three sections: Real-Time and Performance Analysis in Heterogeneous Embedded Systems, Design Tools and Methodology for Multiprocessor System-on-Chip, and Design Tools and Methodology for Multidomain Embedded Systems. The respective contributors share their considerable expertise on the automation of design refinement and how to relate properties throughout this refinement while enabling analytic and synthetic qualities. They focus on multi-core methodological issues, real-time analysis, and modeling and validation, taking into account how optical, electronic, and mechanical components often interface. Model-based design is emerging as a solution to bridge the gap between the availability of computational capabilities and our inability to make full use of them yet. This approach enables teams to start the design process using a high-level model that is gradually refined through abstraction levels to ultimately yield a prototype. When executed well, model-based design encourages enhanced performance and quicker time to market for a product. Illustrating a broad and diverse spectrum of applications such as in the automotive aerospace, health care, consumer electronics, this volume provides designers with practical, readily adaptable modeling solutions for their own practice.

There is currently an increasing demand for concurrent programs. Checking the correctness of concurrent programs is a complex task due to the interleavings of processes. Sometimes, violation of the correctness properties in such systems causes human or resource losses; therefore, it is crucial to check the correctness of such systems. Two main approaches to software analysis are testing and formal verification. Testing can help discover many bugs at a low cost. However, it cannot prove the correctness of a program. Formal verification, on the other hand, is the approach for proving program correctness. Model checking is a formal verification technique that is suitable for concurrent programs. It aims to automatically establish the correctness (expressed in terms of temporal properties) of a program through an exhaustive search of the behavior of the system. Model checking was initially introduced for the purpose of verifying finite‐state concurrent programs, and extending it to infinite‐state systems is an active research area. In this thesis, we focus on the formal verification of parameterized systems. That is, systems in which the number of executing processes is not bounded a priori. We provide fully-automatic and parameterized model checking techniques for establishing the correctness of safety properties for certain classes of concurrent programs. We provide an open‐source prototype for every technique and present our experimental results on several benchmarks. First, we address the problem of automatically checking safety properties for bounded as well as parameterized phaser programs. Phaser programs are concurrent programs that make use of the complex synchronization construct of Habanero Java phasers. For the bounded case, we establish the decidability of checking the violation of program assertions and the undecidability of checking deadlock‐freedom. For the parameterized case, we study different formulations of the verification problem and propose an exact procedure that is guaranteed to terminate for some reachability problems even in the presence of unbounded phases and arbitrarily many spawned processes. Second, we propose an approach for automatic verification of parameterized concurrent programs in which shared variables are manipulated by atomic transitions to count and synchronize the spawned processes. For this purpose, we introduce counting predicates that related counters that refer to the number of processes satisfying some given properties to the variables that are directly manipulated by the concurrent processes. We then combine existing works on the counter, predicate, and constrained monotonic abstraction and build a nested counterexample‐based refinement scheme to establish correctness. Third, we introduce Lazy Constrained Monotonic Abstraction for more efficient exploration of well‐structured abstractions of infinite‐state non‐monotonic systems. We propose several heuristics and assess the efficiency of the proposed technique by extensive experiments using our open‐source prototype. Lastly, we propose a sound but (in general) incomplete procedure for automatic verification of safety properties for a class of fault‐tolerant distributed protocols described in the Heard‐Of (HO for short) model. The HO model is a popular model for describing distributed protocols. We propose a verification procedure that is guaranteed to terminate even for unbounded number of the processes that execute the distributed protocol.

This book presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, and more.

This extensive and increasing use of embedded systems and their integration in everyday products mark a significant evolution in information science and technology. Nowadays embedded systems design is subject to seamless integration with the physical and electronic environment while meeting requirements like reliability, availability, robustness, power consumption, cost, and deadlines. Thus, embedded systems design raises challenging problems for research, such as security, reliable and mobile services, large-scale heterogeneous distributed systems, adaptation, component-based development, and validation and tool-based certification. This book results from the ARTIST FP5 project funded by the European Commision. By integration 28 leading European research institutions with many top researchers in the area, this book assesses and strategically advances the state of the art in embedded systems. The coherently written monograph-like book is a valuable source of reference for researchers active in the field and serves well as an introduction to scientists and professionals interested in learning about embedded systems design.