Advanced Model Order Reduction Techniques In Vlsi Design

Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.

Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the device while requiring a significantly lower simulation time than the full model. With Model Reduction for Circuit Simulation we survey the state of the art in the challenging research field of MOR for ICs, and also address its future research directions. Special emphasis is taken on aspects stemming from miniturisations to the nano scale. Contributions cover complexity reduction using e.g., balanced truncation, Krylov-techniques or POD approaches. For semiconductor applications a focus is on generalising current techniques to differential-algebraic equations, on including design parameters, on preserving stability, and on including nonlinearity by means of piecewise linearisations along solution trajectories (TPWL) and interpolation techniques for nonlinear parts. Furthermore the influence of interconnects and power grids on the physical properties of the device is considered, and also top-down system design approaches in which detailed block descriptions are combined with behavioral models. Further topics consider MOR and the combination of approaches from optimisation and statistics, and the inclusion of PDE models with emphasis on MOR for the resulting partial differential algebraic systems. The methods which currently are being developed have also relevance in other application areas such as mechanical multibody systems, and systems arising in chemistry and to biology. The current number of books in the area of MOR for ICs is very limited, so that this volume helps to fill a gap in providing the state of the art material, and to stimulate further research in this area of MOR. Model Reduction for Circuit Simulation also reflects and documents the vivid interaction between three active research projects in this area, namely the EU-Marie Curie Action ToK project O-MOORE-NICE (members in Belgium, The Netherlands and Germany), the EU-Marie Curie Action RTN-project COMSON (members in The Netherlands, Italy, Germany, and Romania), and the German federal project System reduction in nano-electronics (SyreNe).

This book provides comprehensive coverage of the recent advances in symbolic analysis techniques for design automation of nanometer VLSI systems. The presentation is organized in parts of fundamentals, basic implementation methods and applications for VLSI design. Topics emphasized include statistical timing and crosstalk analysis, statistical and parallel analysis, performance bound analysis and behavioral modeling for analog integrated circuits. Among the recent advances, the Binary Decision Diagram (BDD) based approaches are studied in depth. The BDD-based hierarchical symbolic analysis approaches, have essentially broken the analog circuit size barrier.

An increasing complexity of models used to predict real-world systems leads to the need for algorithms to replace complex models with far simpler ones, while preserving the accuracy of the predictions. This two-volume handbook covers methods as well as applications. This first volume focuses on real-time control theory, data assimilation, real-time visualization, high-dimensional state spaces and interaction of different reduction techniques.

Designing complex integrated circuits relies heavily on mathematical methods and calls for suitable simulation and optimization tools. The current design approach involves simulations and optimizations in different physical domains (device, circuit, thermal, electromagnetic) and in a range of electrical engineering disciplines (logic, timing, power, crosstalk, signal integrity, system functionality). COMSON was a Marie Curie Research Training Network created to meet these new scientific and training challenges by (a) developing new descriptive models that take these mutual dependencies into account, (b) combining these models with existing circuit descriptions in new simulation strategies and (c) developing new optimization techniques that will accommodate new designs. The book presents the main project results in the fields of PDAE modeling and simulation, model order reduction techniques and optimization, based on merging the know-how of three major European semiconductor companies with the combined expertise of university groups specialized in developing suitable mathematical models, numerical schemes and e-learning facilities. In addition, a common Demonstrator Platform for testing mathematical methods and approaches was created to assess whether they are capable of addressing the industry’s problems, and to educate young researchers by providing hands-on experience with state-of-the-art problems.

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

An increasing complexity of models used to predict real-world systems leads to the need for algorithms to replace complex models with far simpler ones, while preserving the accuracy of the predictions. This three-volume handbook covers methods as well as applications. This third volume focuses on applications in engineering, biomedical engineering, computational physics and computer science.

This book facilitates the VLSI-interested individuals with not only in-depth knowledge, but also the broad aspects of it by explaining its applications in different fields, including image processing and biomedical. The deep understanding of basic concepts gives you the power to develop a new application aspect, which is very well taken care of in this book by using simple language in explaining the concepts. In the VLSI world, the importance of hardware description languages cannot be ignored, as the designing of such dense and complex circuits is not possible without them. Both Verilog and VHDL languages are used here for designing. The current needs of high-performance integrated circuits (ICs) including low power devices and new emerging materials, which can play a very important role in achieving new functionalities, are the most interesting part of the book. The testing of VLSI circuits becomes more crucial than the designing of the circuits in this nanometer technology era. The role of fault simulation algorithms is very well explained, and its implementation using Verilog is the key aspect of this book. This book is well organized into 20 chapters. Chapter 1 emphasizes on uses of FPGA on various image processing and biomedical applications. Then, the descriptions enlighten the basic understanding of digital design from the perspective of HDL in Chapters 2–5. The performance enhancement with alternate material or geometry for silicon-based FET designs is focused in Chapters 6 and 7. Chapters 8 and 9 describe the study of bimolecular interactions with biosensing FETs. Chapters 10–13 deal with advanced FET structures available in various shapes, materials such as nanowire, HFET, and their comparison in terms of device performance metrics calculation. Chapters 14–18 describe different application-specific VLSI design techniques and challenges for analog and digital circuit designs. Chapter 19 explains the VLSI testability issues with the description of simulation and its categorization into logic and fault simulation for test pattern generation using Verilog HDL. Chapter 20 deals with a secured VLSI design with hardware obfuscation by hiding the IC’s structure and function, which makes it much more difficult to reverse engineer.