Nanometer Frequency Synthesis Beyond The Phase Locked Loop

Introducing a new, pioneering approach to integrated circuit design Nanometer Frequency Synthesis Beyond Phase-Locked Loop introduces an innovative new way of looking at frequency that promises to open new frontiers in modern integrated circuit (IC) design. While most books on frequency synthesis deal with the phase-locked loop (PLL), this book focuses on the clock signal. It revisits the concept of frequency, solves longstanding problems in on-chip clock generation, and presents a new time-based information processing approach for future chip design. Beginning with the basics, the book explains how clock signal is used in electronic applications and outlines the shortcomings of conventional frequency synthesis techniques for dealing with clock generation problems. It introduces the breakthrough concept of Time-Average-Frequency, presents the Flying-Adder circuit architecture for the implementation of this approach, and reveals a new circuit device, the Digital-to-Frequency Converter (DFC). Lastly, it builds upon these three key components to explain the use of time rather than level to represent information in signal processing. Provocative, inspiring, and chock-full of ideas for future innovations, the book features: A new way of thinking about the fundamental concept of clock frequency A new circuit architecture for frequency synthesis: the Flying-Adder direct period synthesis A new electronic component: the Digital-to-Frequency Converter A new information processing approach: time-based vs. level-based Examples demonstrating the power of this technology to build better, cheaper, and faster systems Written with the intent of showing readers how to think outside the box, Nanometer Frequency Synthesis Beyond the Phase-Locked Loop is a must-have resource for IC design engineers and researchers as well as anyone who would like to be at the forefront of modern circuit design.

This book states that a space-induced crisis is recognized as the cause of trouble that Moore’s Law is currently facing. The contemporary practice of this empirical law can be considered as happening within a space-dominant paradigm. An alternative of exploiting potential in the dimension of time is identified as an emerging paradigm in microelectronics. The new practice is termed a time-oriented paradigm. It is justified as the turn of Moore’s Law from space to time. The resultant Time-Moore strategy is envisioned as the next-generation enabler for continuing Moore’s Law’s pursuit of everhigher information processing power and efficiency. It also serves as the perpetuation of the spirit that Moore’s law is nothing but a collective storied history of innovations. In the first part of this book, by following Thomas Kuhn’s seminal work around the concepts of paradigm and scientific revolution, the argument for the Time-Moore strategy (Time-Moore: to use time more) and the paradigm shift from space to time is carried out heavily through philosophical persuasion rather than technical proof due to the difficult challenge of change-of-mindset. The second part of the book provides solid technical materials for supporting this transition from the old paradigm to the new one. In short, the goal of this book is to reevaluate the contemporary practice of microelectronics, identify the cause of the current crisis, advocate a change-of-mindset to circumvent the crisis, and ultimately point out a new route for advancing. After achieving so many unprecedented accomplishments through several decades of relentless endeavor, it’s time for the big ship of Moore’s Law (i.e., the art of microelectronic system design) to make a turn.

The book addresses the need to investigate new approaches to lower energy requirement in multiple application areas and serves as a guide into emerging circuit technologies. It explores revolutionary device concepts, sensors, and associated circuits and architectures that will greatly extend the practical engineering limits of energy-efficient computation. The book responds to the need to develop disruptive new system architecutres, circuit microarchitectures, and attendant device and interconnect technology aimed at achieving the highest level of computational energy efficiency for general purpose computing systems. Features Discusses unique technologies and material only available in specialized journal and conferences Covers emerging applications areas, such as ultra low power communications, emerging bio-electronics, and operation in extreme environments Explores broad circuit operation, ex. analog, RF, memory, and digital circuits Contains practical applications in the engineering field, as well as graduate studies Written by international experts from both academia and industry

Written in a simple, easy to understand style, this book will teach PLL users how to use new clock technology in their work in order to create innovative applications. Investigates the clock frequency concept from a different perspective--at an application level Teaches engineers to use this new clocking technology to create innovations in chip/system level, through real examples extracted from commercial products

A revised guide to the theory and implementation of CMOS analog and digital IC design The fourth edition of CMOS: Circuit Design, Layout, and Simulation is an updated guide to the practical design of both analog and digital integrated circuits. The author—a noted expert on the topic—offers a contemporary review of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and switching power supplies. CMOS includes discussions that detail the trade-offs and considerations when designing at the transistor-level. The companion website contains numerous examples for many computer-aided design (CAD) tools. Using the website enables readers to recreate, modify, or simulate the design examples presented throughout the book. In addition, the author includes hundreds of end-of-chapter problems to enhance understanding of the content presented. This newly revised edition: • Provides in-depth coverage of both analog and digital transistor-level design techniques • Discusses the design of phase- and delay-locked loops, mixed-signal circuits, data converters, and circuit noise • Explores real-world process parameters, design rules, and layout examples • Contains a new chapter on Power Electronics Written for students in electrical and computer engineering and professionals in the field, the fourth edition of CMOS: Circuit Design, Layout, and Simulation is a practical guide to understanding analog and digital transistor-level design theory and techniques.

A comprehensive one-volume reference on current JLFET methods, techniques, and research Advancements in transistor technology have driven the modern smart-device revolution—many cell phones, watches, home appliances, and numerous other devices of everyday usage now surpass the performance of the room-filling supercomputers of the past. Electronic devices are continuing to become more mobile, powerful, and versatile in this era of internet-of-things (IoT) due in large part to the scaling of metal-oxide semiconductor field-effect transistors (MOSFETs). Incessant scaling of the conventional MOSFETs to cater to consumer needs without incurring performance degradation requires costly and complex fabrication process owing to the presence of metallurgical junctions. Unlike conventional MOSFETs, junctionless field-effect transistors (JLFETs) contain no metallurgical junctions, so they are simpler to process and less costly to manufacture.JLFETs utilize a gated semiconductor film to control its resistance and the current flowing through it. Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an inclusive, one-stop referenceon the study and research on JLFETs This timely book covers the fundamental physics underlying JLFET operation, emerging architectures, modeling and simulation methods, comparative analyses of JLFET performance metrics, and several other interesting facts related to JLFETs. A calibrated simulation framework, including guidance on SentaurusTCAD software, enables researchers to investigate JLFETs, develop new architectures, and improve performance. This valuable resource: Addresses the design and architecture challenges faced by JLFET as a replacement for MOSFET Examines various approaches for analytical and compact modeling of JLFETs in circuit design and simulation Explains how to use Technology Computer-Aided Design software (TCAD) to produce numerical simulations of JLFETs Suggests research directions and potential applications of JLFETs Junctionless Field-Effect Transistors: Design, Modeling, and Simulation is an essential resource for CMOS device design researchers and advanced students in the field of physics and semiconductor devices.

Offers a comprehensive overview of NAND flash memories, with insights into NAND history, technology, challenges, evolutions, and perspectives Describes new program disturb issues, data retention, power consumption, and possible solutions for the challenges of 3D NAND flash memory Written by an authority in NAND flash memory technology, with over 25 years’ experience

This new edition introduces operation and design techniques for Sigma-Delta converters in physical and conceptual terms, and includes chapters which explore developments in the field over the last decade Includes information on MASH architectures, digital-to-analog converter (DAC) mismatch and mismatch shaping Investigates new topics including continuous-time ΔΣ analog-to-digital converters (ADCs) principles and designs, circuit design for both continuous-time and discrete-time ΔΣ ADCs, decimation and interpolation filters, and incremental ADCs Provides emphasis on practical design issues for industry professionals