Soi

This book first introduces SOI device physics and its fundamental idiosyncrasies. It then walks the reader through realizations of these mechanisms, which are observed in common high-speed microprocessor designs. The book also offers rules of thumb and comparisons to conventional bulk CMOS to guide implementation and describes a number of unique circuit topologies that SOI supports.

A practical, comprehensive survey of SOI CMOS devices and circuitsfor microelectronics engineers The microelectronics industry is becoming increasingly dependent onSOI CMOS VLSI devices and circuits. This book is the first toaddress this important topic with a practical focus on devices andcircuits. It provides an up-to-date survey of the current knowledgeregarding SOI device behaviors and describes state-of-the-artlow-voltage CMOS VLSI analog and digital circuit techniques. Low-Voltage SOI CMOS VLSI Devices and Circuits covers the entirefield, from basic concepts to the most advanced ideas. Topicsinclude: * SOI device behavior: fundamental and floating body effects, hotcarrier effects, sensitivity, reliability, self-heating, breakdown,ESD, dual-gate devices, accumulation-mode devices, short channeleffects, and narrow channel effects * Low-voltage SOI digital circuits: floating body effects, DRAM,SRAM, static logic, dynamic logic, gate array, CPU, frequencydivider, and DSP * Low-voltage SOI analog circuits: op amps, filters, ADC/DAC,sigma-delta modulators, RF circuits, VCO, mixers, low-noiseamplifiers, and high-temperature circuits With over 300 references to the state of the art and over 300important figures on low-voltage SOI CMOS devices and circuits,this volume serves as an authoritative, reliable resource forengineers designing these circuits in high-tech industries.

A review of the electrical properties, performance and physical mechanisms of the main silicon-on-insulator (SOI) materials and devices. Particular attention is paid to the reliability of SOI structures operating in harsh conditions. The first part of the book deals with material technology and describes the SIMOX and ELTRAN technologies, the smart-cut technique, SiCOI structures and MBE growth. The second part covers reliability of devices operating under extreme conditions, with an examination of low and high temperature operation of deep submicron MOSFETs and novel SOI technologies and circuits, SOI in harsh environments and the properties of the buried oxide. The third part deals with the characterization of advanced SOI materials and devices, covering laser-recrystallized SOI layers, ultrashort SOI MOSFETs and nanostructures, gated diodes and SOI devices produced by a variety of techniques. The last part reviews future prospects for SOI structures, analyzing wafer bonding techniques, applications of oxidized porous silicon, semi-insulating silicon materials, self-organization of silicon dots and wires on SOI and some new physical phenomena.

Co-integration of sensors with their associated electronics on a single silicon chip may provide many significant benefits regarding performance, reliability, miniaturization and process simplicity without significantly increasing the total cost. Micromachined Thin-Film Sensors for SOI-CMOS Co-integration covers the challenges and interests and demonstrates the successful co-integration of gas-flow sensors on dielectric membrane, with their associated electronics, in CMOS-SOI technology. We firstly investigate the extraction of residual stress in thin layers and in their stacking and the release, in post-processing, of a 1 μm-thick robust and flat dielectric multilayered membrane using Tetramethyl Ammonium Hydroxide (TMAH) silicon micromachining solution. The optimization of its selectivity towards aluminum is largely demonstrated. The second part focuses on sensors design and characteristics. A novel loop-shape polysilicon microheater is designed and built in a CMOS-SOI standard process. High thermal uniformity, low power consumption and high working temperature are confirmed by extensive measurements. The additional gas flow sensing layers are judiciously chosen and implemented. Measurements in the presence of a nitrogen flow and gas reveal fair sensitivity on a large flow velocity range as well as good response to many gases. Finally, MOS transistors suspended on released dielectric membranes are presented and fully characterized as a concluding demonstrator of the co-integration in SOI technology.

This title introduces state-of-the-art design principles for SOI circuit design, and is primarily concerned with circuit-related issues. It considers SOI material in terms of implementation that is promising or has been used elsewhere in circuit development, with historical perspective where appropriate.

Advanced level consolidation of the technology, physics and design aspects of silicon-on-insulator (SOI) lubistors No comprehensive description of the physics and possible applications of the Lubistor can be found in a single source even though the Lubistor is already being used in SOI LSIs. The book provides, for the first time, a comprehensive understanding of the physics of the Lubistor. The author argues that a clear understanding of the fundamental physics of the pn junction is essential to allowing scientists and engineers to propose new devices. Since 2001 IBM has been applying the Lubistor to commercial SOI LSIs (large scale integrated devices) used in PCs and game machines. It is a key device in that it provides electrostatic protection to the LSIs. The book explains the device modeling for such applications, and covers the recent analog circuit application of the voltage reference circuit. The author also reviews the physics and the modeling of ideal and non-ideal pn junctions through reconsideration of the Shockley’s theory, offering readers an opportunity to study the physics of pn junction. Pn-junction devices are already applied to the optical communication system as the light emitter and the receiver. Alternatively, optical signal modulators are proposed for coupling the Si optical waveguide with the pn-junction injector. The book also explores the photonic crystal physics and device applications of the Lubistor. Advanced level consolidation of the technology, physics and design aspects of silicon-on-insulator (SOI) lubistors Written by the inventor of the Lubistor, this volume describes the technology for readers to understand the physics and applications of the device First book devoted to the Lubistor transistor, presently being utilized in electrostatic discharge (ESD) applications in SOI technology, a growing market for semiconductor devices and advanced technologies Approaches the topic in a systematic manner, from physical theory, through to modelling, and finally circuit applications This is an advanced level book requiring knowledge of electrical and electronics engineering at graduate level. Contents includes: Concept of Ideal pn Junction/Proposal of Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor)/ Noise Characteristics and Modeling of Lubistor/Negative Conductance Properties in Extremely Thin SOI Lubistors/ Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors/ Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors/ Gate-Controlled Bipolar Action in Ultra-thin Dynamic Threshold SOI MOSFET/Sub-Circuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications/A New Basic Element for Neural Logic Functions and Functionality in Circuit Applications/Possible Implementation of SOI Lubistors into Conventional Logic Circuits/Potentiality of Electro-Optic Modulator Based on SOI Waveguide/Principles of Parameter Extraction/Feasibility of Lubistor-Based Avalanche Photo Transistor

Memory devices based on floating-body effects (FBE) in Silicon-on-Insulator (SOI) technology are among the most promising candidates for sub-100nm and low power Dynamic Random Access Memory (DRAM). This new type of DRAMs, called Zero-Capacitor RAM (Z-RAM), uses only one transistor in partially-depleted (PD) SOI technology and takes advantage of FBE which have been considered as parasitic phenomena until now. The Z-RAM programming principles are based on the threshold voltage VTH variations induced by the excess or lack of majority carriers in the floating body. In this dissertation, a new floating-body effect, the Transient Floating Body Potential Effect (TFBPE), based on the body majority carriers non-equilibrium and on the dual dynamic gate coupling in standard fully-depleted (FD) SOI MOSFETs is presented for the first time. The TFBPE occurs in a specific gate bias range and can induce strong hysteresis of the gate and drain current characteristics although the FD SOI transistors are usually known to be immune against the FBE and their aftermaths. Adapted from the same physics principles as in the drain current hysteresis, that we called the Meta-Stable Dip (MSD) effect, a new concept of one-transistor capacitor-less memory was also proposed, the Meta-Stable DRAM (MSDRAM) which is dedicated for double-gate operations. All the experimental results and physics interpretations were supported by 2D numerical simulations. A 1D semi-analytical model of the body potential for non-equilibrium states was also proposed. For the first time, this original body-potential model takes into account the majority carriers density variations, i.e., the quasi-Fermi level non-equilibrium versus a transient gate voltage scan in a FD MOS device.

Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.