Sub Micron Semiconductor Devices

This comprehensive reference text discusses novel semiconductor devices, including nanostructure field-effect transistors, photodiodes, high electron mobility transistors, and oxide-based devices. The text covers submicron semiconductor devices, device modeling, novel materials for devices, novel semiconductor devices, optimization techniques, and their application in detail. It covers such important topics as negative capacitance devices, surface-plasmon resonance devices, Fermi-level pinning, external stimuli-based optimization techniques, optoelectronic devices, and architecture-based optimization techniques. The book: Covers novel semiconductor devices with submicron dimensions Discusses comprehensive device optimization techniques Examines conceptualization and modeling of semiconductor devices Covers circuit and sensor-based application of the novel devices Discusses novel materials for next-generation devices This text will be useful for graduate students and professionals in fields including electrical engineering, electronics and communication engineering, materials science, and nanoscience.

This comprehensive reference text discusses novel semiconductor devices, including nanostructure field-effect transistors, photodiodes, high electron mobility transistors, and oxide-based devices. The text covers submicron semiconductor devices, device modeling, novel materials for devices, novel semiconductor devices, optimization techniques, and their application in detail. It covers such important topics as negative capacitance devices, surface-plasmon resonance devices, Fermi-level pinning, external stimuli-based optimization techniques, optoelectronic devices, and architecture-based optimization techniques. The book: Covers novel semiconductor devices with submicron dimensions Discusses comprehensive device optimization techniques Examines conceptualization and modeling of semiconductor devices Covers circuit and sensor-based application of the novel devices Discusses novel materials for next-generation devices This text will be useful for graduate students and professionals in fields including electrical engineering, electronics and communication engineering, materials science, and nanoscience.

The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibrium transport, quantum transport, interfacial and size constraints issues were also highlighted. The ASI was supported by NATO and the European Research Office. H. L. Grubin D. K. Ferry C. Jacoboni v CONTENTS MODELLING OF SUB-MICRON DEVICES.................. .......... 1 E. Constant BOLTZMANN TRANSPORT EQUATION... ... ...... .................... 33 K. Hess TRANSPORT AND MATERIAL CONSIDERATIONS FOR SUBMICRON DEVICES. . .. . . . . .. . . . .. . .. . .... ... .. . . . .. . . . .. . . . . . . . . . . 45 H. L. Grubin EPITAXIAL GROWTH FOR SUB MICRON STRUCTURES.................. 179 C. E. C. Wood INSULATOR/SEMICONDUCTOR INTERFACES.......................... 195 C. W. Wilms en THEORY OF THE ELECTRONIC STRUCTURE OF SEMICONDUCTOR SURFACES AND INTERFACES......................................... 223 C. Calandra DEEP LEVELS AT COMPOUND-SEMICONDUCTOR INTERFACES........... 253 W. Monch ENSEMBLE MONTE CARLO TECHNIqUES............................. 289 C. Jacoboni NOISE AND DIFFUSION IN SUBMICRON STRUCTURES................. 323 L. Reggiani SUPERLATTICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361 . . . . . . . . . . . . K. Hess SUBMICRON LITHOGRAPHY 373 C. D. W. Wilkinson and S. P. Beaumont QUANTUM EFFECTS IN DEVICE STRUCTURES DUE TO SUBMICRON CONFINEMENT IN ONE DIMENSION.... ....................... 401 B. D. McCombe vii viii CONTENTS PHYSICS OF HETEROSTRUCTURES AND HETEROSTRUCTURE DEVICES..... 445 P. J. Price CORRELATION EFFECTS IN SHORT TIME, NONS TAT I ONARY TRANSPORT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 477 . . . . . . . . . . . . J. J. Niez DEVICE-DEVICE INTERACTIONS............ ...................... 503 D. K. Ferry QUANTUM TRANSPORT AND THE WIGNER FUNCTION................... 521 G. J. Iafrate FAR INFRARED MEASUREMENTS OF VELOCITY OVERSHOOT AND HOT ELECTRON DYNAMICS IN SEMICONDUCTOR DEVICES............. 577 S. J. Allen, Jr.

Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction: A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter. The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters. The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance. The impact of process parameters on the matching properties is discussed. The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor. Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the stochastic properties of the MOSFET.

The advent of the microelectronics technology has made ever-increasing numbers of small devices on a same chip. The rapid emergence of ultra-large-scaled-integrated (ULSI) technology has moved device dimension into the sub-quarter-micron regime and put more than 10 million transistors on a single chip. While traditional closed-form analytical models furnish useful intuition into how semiconductor devices behave, they no longer provide consistently accurate results for all modes of operation of these very small devices. The reason is that, in such devices, various physical mechanisms affect the device performance in a complex manner, and the conventional assumptions (i. e. , one-dimensional treatment, low-level injection, quasi-static approximation, etc. ) em ployed in developing analytical models become questionable. Thus, the use of numerical device simulation becomes important in device modeling. Researchers and engineers will rely even more on device simulation for device design and analysis in the future. This book provides comprehensive coverage of device simulation and analysis for various modem semiconductor devices. It will serve as a reference for researchers, engineers, and students who require in-depth, up-to-date information and understanding of semiconductor device physics and characteristics. The materials of the book are limited to conventional and mainstream semiconductor devices; photonic devices such as light emitting and laser diodes are not included, nor does the book cover device modeling, device fabrication, and circuit applications.