A Framework For Automated Hw Sw Co Verification Of Systemc Designs Using Timed Automata

In this dissertation, we present a systematic, comprehensive, and formally founded quality assurance process, which allows automated co-verification of digital hardware/software systems that are modeled in SystemC. The main idea is to apply model checking to verify that an abstract design meets a requirements specification and to generate conformance tests to check whether refined designs conform to this abstract design. As formal foundation, we define a formal semantics of SystemC by a transformation into the well-defined semantics of UPPAAL timed automata. The automatically generated timed automata model can be verified using the UPPAAL model checker and it can be used to generate conformance tests. With that, we obtain guarantees about liveness, safety, and timing properties of the abstract design, which serves as a specification, and we can ensure the consistency of each refined design to that. The result is a HW/SW co-verification flow that supports the HW/SW co-development process continuously from abstract design down to the implementation. The complete verification flow is implemented in our Framework for the Verification of SystemC designs using Timed Automata (VeriSTA) and its applicability and performance are shown by experimental results.

This book constitutes the refereed proceedings of the 4th IFIP TC 10 International Embedded Systems Symposium, IESS 2013, held in Paderborn, Germany, in June 2013. The 22 full revised papers presented together with 8 short papers were carefully reviewed and selected from 42 submissions. The papers have been organized in the following topical sections: design methodologies; non-functional aspects of embedded systems; verification; performance analysis; real-time systems; embedded system applications; and real-time aspects in distributed systems. The book also includes a special chapter dedicated to the BMBF funded ARAMIS project on Automotive, Railway and Avionics Multicore Systems.

Software reuse and integration has been described as the process of creating software systems from existing software rather than building software systems from scratch. Whereas reuse solely deals with the artifacts creation, integration focuses on how reusable artifacts interact with the already existing parts of the specified transformation. Currently, most reuse research focuses on creating and integrating adaptable components at development or at compile time. However, with the emergence of ubiquitous computing, reuse technologies that can support adaptation and reconfiguration of architectures and components at runtime are in demand. This edited book includes 15 high quality research papers written by experts in information reuse and integration to cover the most recent advances in the field. These papers are extended versions of the best papers which were presented at IEEE International Conference on Information Reuse and Integration and IEEE International Workshop on Formal Methods Integration, which was held in San Francisco in August 2013.

This book presents the lecture notes of the 1st Summer School on Methods and Tools for the Design of Digital Systems, 2015, held in Bremen, Germany. The topic of the summer school was devoted to modeling and verification of cyber-physical systems. This covers several aspects of the field, including hybrid systems and model checking, as well as applications in robotics and aerospace systems. The main chapters have been written by leading scientists, who present their field of research, each providing references to introductory material as well as latest scientific advances and future research directions. This is complemented by short papers submitted by the participating PhD students.

This book constitutes the refereed proceedings of the 24th Symposium on Formal Methods, FM 2021, held virtually in November 2021. The 43 full papers presented together with 4 invited presentations were carefully reviewed and selected from 131 submissions. The papers are organized in topical sections named: Invited Presentations. - Interactive Theorem Proving, Neural Networks & Active Learning, Logics & Theory, Program Verification I, Hybrid Systems, Program Verification II, Automata, Analysis of Complex Systems, Probabilities, Industry Track Invited Papers, Industry Track, Divide et Impera: Efficient Synthesis of Cyber-Physical System.

The two-volume set LNCS 14499 and 14500 constitutes the proceedings of the 25th International Conference on Verification, Model Checking, and Abstract Interpretation, VMCAI 2024, which took place in London, Ontario, Canada, in January 2024. The 30 full papers presented in the proceedings were carefully reviewed and selected from 74 submissions. They were organized in topical sections as follows:Part I: Abstract interpretation; infinite-state systems; model checking and synthesis; SAT, SMT, and automated reasoning; Part II: Concurrency; neural networks; probabilistic and quantum programs; program and system verification; runtime verification; security and privacy;

This book describes a set of SystemC‐based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process.

This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.