Applied Formal Verification

Formal verification is a powerful new digital design method. In this cutting-edge tutorial, two of the field's best known authors team up to show designers how to efficiently apply Formal Verification, along with hardware description languages like Verilog and VHDL, to more efficiently solve real-world design problems. Contents: Simulation-Based Verification * Introduction to Formal Techniques * Contrasting Simulation vs. Formal Techniques * Developing a Formal Test Plan * Writing High-Level Requirements * Proving High-Level Requirements * System Level Simulation * Design Example * Formal Test Plan * Final System Simulation

An essential introduction to the analysis and verification of control system software The verification of control system software is critical to a host of technologies and industries, from aeronautics and medical technology to the cars we drive. The failure of controller software can cost people their lives. In this authoritative and accessible book, Pierre-Loïc Garoche provides control engineers and computer scientists with an indispensable introduction to the formal techniques for analyzing and verifying this important class of software. Too often, control engineers are unaware of the issues surrounding the verification of software, while computer scientists tend to be unfamiliar with the specificities of controller software. Garoche provides a unified approach that is geared to graduate students in both fields, covering formal verification methods as well as the design and verification of controllers. He presents a wealth of new verification techniques for performing exhaustive analysis of controller software. These include new means to compute nonlinear invariants, the use of convex optimization tools, and methods for dealing with numerical imprecisions such as floating point computations occurring in the analyzed software. As the autonomy of critical systems continues to increase—as evidenced by autonomous cars, drones, and satellites and landers—the numerical functions in these systems are growing ever more advanced. The techniques presented here are essential to support the formal analysis of the controller software being used in these new and emerging technologies.

Industrial Strength Formal Methods in Practice provides hands-on experience and guidance for anyone who needs to apply formal methods successfully in an industrial context. Each chapter is written by an expert in software engineering or formal methods, and contains background information, introductions to the techniques being used, actual fragments of formalised components, details of results and an analysis of the overall approach. It provides specific details on how to produce high-quality software that comes in on-time and within budget. Aimed mainly at practitioners in software engineering and formal methods, this book will also be of interest to the following groups; academic researchers working in formal methods who are interested in evidence of their success and in how they can be applied on an industrial scale, and students on advanced software engineering courses who need real-life specifications and examples on which to base their work.

This volume contains the contributions presented at the International Workshop on Current Trends in Applied Formal Methods organized October 7-9, 1998, in Boppard, Germany. The main objective of the workshop was to draw a map of the key issues facing the practical application of formal methods in industry. This appears to be particularly timely with safety and security issues becoming a real obstacle to industrial software and hardware development. As a consequence, almost all major companies have now set up departments or groups to work with formal methods and many European countries face a severe labour shortage in this new field. Tony Hoare's prediction of the art of software (and hardware) development becoming a proper engineering science with its own body of tools and techniques is now becoming a reality. So the focus of this application oriented workshop was not so much on spe cial academic topics but rather on the many practical aspects of this emerging new technology: verification and validation, and tool support and integration into the software life-cycle. By evaluating the state of the art with respect to industrial applications a discussion emerged among scientists, practising engi neers, and members of regulatory and funding agencies about future needs and developments. This discussion lead to roadmaps with respect to the future of this field, to tool support, and potential application areas and promising market segments. The contributions of the participants from industry as well as from the respective national security bureaus were particularly valuable and highly appreciated.

This textbook is an introduction to the use of formal methods ranging from semantics of key programming constructs to techniques for the analysis and verification of programs. The authors use program graphs as the mechanism for representing the control structure of programs in order to find a balance between generality and conceptual complexity. The early chapters on program graphs and the Guarded Commands language are sufficient introduction for most readers to then enjoy a plug-and-play approach to the remaining chapters. These explain formal methods for analysing the behaviour of programs in various ways ranging from verification, via program analysis and language-based security, to model checking. The remaining chapters present language extensions with procedures and concurrency and cover their semantics. The book is suitable for advanced undergraduate and graduate courses in software development, and the text is supported throughout with exercises of varying grades of difficulty. The authors have developed an online learning environment that allows students to create examples beyond those covered in the main text, and in the book appendices they present programming projects aimed at implementing central parts of the development using the functional language F#.

Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mathematically explore the quality or other aspects of a Register Transfer Level (RTL) design without using simulations. This can reduce time spent validating designs and more quickly reach a final design for manufacturing. Building on a basic knowledge of SystemVerilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes. Every chapter in the second edition has been updated to reflect evolving FV practices and advanced techniques. In addition, a new chapter, Formal Signoff on Real Projects, provides guidelines for implementing signoff quality FV, completely replacing some simulation tasks with significantly more productive FV methods. After reading this book, readers will be prepared to introduce FV in their organization to effectively deploy FV techniques that increase design and validation productivity. Covers formal verification algorithms that help users gain full coverage without exhaustive simulation Helps readers understand formal verification tools and how they differ from simulation tools Shows how to create instant testbenches to gain insights into how models work and to find initial bugs Presents insights from Intel insiders who share their hard-won knowledge and solutions to complex design problems

There are already many books on formal verification, from academic to application-centric, and from tutorials for beginners to guides for advanced users. Many are excellent for their intended purpose; we recommend a few at the end of this book. But most start from the assumption that you have already committed to becoming a hands-on expert (or in some cases that you already are an expert). We feel that detailed tutorials are not the easiest place to extract the introductory view many of us are looking for - background, a general idea of how methods work, applications and how formal verification is managed in the overall verification objective. Since we're writing for a fairly wide audience, we cover some topics that some of you may consider elementary (why verification is hard), some we hope will be of general interest (elementary understanding of the technology) and others that may not immediately interest some readers (setting up a formal verification team). What we intentionally do not cover at all is how to become a hands-on expert.

This state-of-the-art monograph presents a coherent survey of a variety of methods and systems for formal hardware verification. It emphasizes the presentation of approaches that have matured into tools and systems usable for the actual verification of nontrivial circuits. All in all, the book is a representative and well-structured survey on the success and future potential of formal methods in proving the correctness of circuits. The various chapters describe the respective approaches supplying theoretical foundations as well as taking into account the application viewpoint. By applying all methods and systems presented to the same set of IFIP WG10.5 hardware verification examples, a valuable and fair analysis of the strenghts and weaknesses of the various approaches is given.