Computer Logic Testing And Verification

In order to design and build computers that achieve and sustain high performance, it is essential that reliability issues be considered care fully. The problem has several aspects. Certainly, considering reliability implies that an engineer must be able to analyze how design decisions affect the incidence of failure. For instance, in order design reliable inte gritted circuits, it is necessary to analyze how decisions regarding design rules affect the yield, i.e., the percentage of functional chips obtained by the manufacturing process. Of equal importance in producing reliable computers is the detection of failures in its Very Large Scale Integrated (VLSI) circuit components, caused by errors in the design specification, implementation, or manufacturing processes. Design verification involves the checking of the specification of a design for correctness prior to carrying out an implementation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that there are no manufacturing defects in the integrated circuit. It should be noted that all the above verification mechanisms deal not only with verifying the functionality of the integrated circuit but also its performance.

This book constitutes the thoroughly refereed post-proceedings of the First Combined International Workshops on Formal Approaches to Software Testing, FATES 2006, and on Runtime Verification, RV 2006, held within the scope of FLoC 2006, the Federated Logic Conference in Seattle, WA, USA in August 2006. Coverage discusses formal approaches to test and analyze programs and monitor and guide their executions by using various techniques.

An introduction to applying predicate logic to testing and verification of software and digital circuits that focuses on applications rather than theory. Computer scientists use logic for testing and verification of software and digital circuits, but many computer science students study logic only in the context of traditional mathematics, encountering the subject in a few lectures and a handful of problem sets in a discrete math course. This book offers a more substantive and rigorous approach to logic that focuses on applications in computer science. Topics covered include predicate logic, equation-based software, automated testing and theorem proving, and large-scale computation. Formalism is emphasized, and the book employs three formal notations: traditional algebraic formulas of propositional and predicate logic; digital circuit diagrams; and the widely used partially automated theorem prover, ACL2, which provides an accessible introduction to mechanized formalism. For readers who want to see formalization in action, the text presents examples using Proof Pad, a lightweight ACL2 environment. Readers will not become ALC2 experts, but will learn how mechanized logic can benefit software and hardware engineers. In addition, 180 exercises, some of them extremely challenging, offer opportunities for problem solving. There are no prerequisites beyond high school algebra. Programming experience is not required to understand the book's equation-based approach. The book can be used in undergraduate courses in logic for computer science and introduction to computer science and in math courses for computer science students.

This advanced textbook presents an almost complete overview of techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. Each chapter contains an introduction and a summary as well as a section for the advanced reader, aiding an understanding of the advantages and limitations of each technique. Backed by many examples and illustrations, this text will appeal to a broad audience, from beginners in system design to experts. XXXXXXX Neuer Text This is a complete overview of existing techniques for hardware verification. It covers all approaches used in existing verification tools, such as symbolic methods for equivalence checking, temporal logic model checking, and higher-order logic theorem proving for verifying circuit correctness. The book helps readers to understand the advantages and limitations of each technique. Each chapter contains a summary as well as a section for the advanced reader.