Design Exploration Of Emerging Nano Scale Non Volatile Memory

This book presents the latest techniques for characterization, modeling and design for nano-scale non-volatile memory (NVM) devices. Coverage focuses on fundamental NVM device fabrication and characterization, internal state identification of memristic dynamics with physics modeling, NVM circuit design and hybrid NVM memory system design-space optimization. The authors discuss design methodologies for nano-scale NVM devices from a circuits/systems perspective, including the general foundations for the fundamental memristic dynamics in NVM devices. Coverage includes physical modeling, as well as the development of a platform to explore novel hybrid CMOS and NVM circuit and system design. • Offers readers a systematic and comprehensive treatment of emerging nano-scale non-volatile memory (NVM) devices; • Focuses on the internal state of NVM memristic dynamics, novel NVM readout and memory cell circuit design and hybrid NVM memory system optimization; • Provides both theoretical analysis and practical examples to illustrate design methodologies; • Illustrates design and analysis for recent developments in spin-toque-transfer, domain-wall racetrack and memristors.

This book offers detailed insights into spin transfer torque (STT) based devices, circuits and memories. Starting with the basic concepts and device physics, it then addresses advanced STT applications and discusses the outlook for this cutting-edge technology. It also describes the architectures, performance parameters, fabrication, and the prospects of STT based devices. Further, moving from the device to the system perspective it presents a non-volatile computing architecture composed of STT based magneto-resistive and all-spin logic devices and demonstrates that efficient STT based magneto-resistive and all-spin logic devices can turn the dream of instant on/off non-volatile computing into reality.

Mem-elements for Neuromorphic Circuits with Artificial Intelligence Applications illustrates recent advances in the field of mem-elements (memristor, memcapacitor, meminductor) and their applications in nonlinear dynamical systems, computer science, analog and digital systems, and in neuromorphic circuits and artificial intelligence. The book is mainly devoted to recent results, critical aspects and perspectives of ongoing research on relevant topics, all involving networks of mem-elements devices in diverse applications. Sections contribute to the discussion of memristive materials and transport mechanisms, presenting various types of physical structures that can be fabricated to realize mem-elements in integrated circuits and device modeling. As the last decade has seen an increasing interest in recent advances in mem-elements and their applications in neuromorphic circuits and artificial intelligence, this book will attract researchers in various fields. Covers a broad range of interdisciplinary topics between mathematics, circuits, realizations, and practical applications related to nonlinear dynamical systems, nanotechnology, analog and digital systems, computer science and artificial intelligence Presents recent advances in the field of mem-elements (memristor, memcapacitor, meminductor) Includes interesting applications of mem-elements in nonlinear dynamical systems, analog and digital systems, neuromorphic circuits, computer science and artificial intelligence

Kevin Zhang Advancement of semiconductor technology has driven the rapid growth of very large scale integrated (VLSI) systems for increasingly broad applications, incl- ing high-end and mobile computing, consumer electronics such as 3D gaming, multi-function or smart phone, and various set-top players and ubiquitous sensor and medical devices. To meet the increasing demand for higher performance and lower power consumption in many different system applications, it is often required to have a large amount of on-die or embedded memory to support the need of data bandwidth in a system. The varieties of embedded memory in a given system have alsobecome increasingly more complex, ranging fromstatictodynamic and volatile to nonvolatile. Among embedded memories, six-transistor (6T)-based static random access memory (SRAM) continues to play a pivotal role in nearly all VLSI systems due to its superior speed and full compatibility with logic process technology. But as the technology scaling continues, SRAM design is facing severe challenge in mainta- ing suf?cient cell stability margin under relentless area scaling. Meanwhile, rapid expansion in mobile application, including new emerging application in sensor and medical devices, requires far more aggressive voltage scaling to meet very str- gent power constraint. Many innovative circuit topologies and techniques have been extensively explored in recent years to address these challenges.

Advances in Computers, Volume 118, the latest volume in this innovative series published since 1960, presents detailed coverage of new advancements in computer hardware, software, theory, design and applications. Chapters in this updated release include Introduction to non-volatile memory technologies, The emerging phase-change memory, Phase-change memory architectures, Inter-line level schemes for handling hard errors in PCMs, Handling hard errors in PCMs by using intra-line level schemes, and Addressing issues with MLC Phase-change Memory. Gives a comprehensive overlook of new memory technologies, including PCM Provides reliability features with an in-depth discussion of physical mechanisms that are currently limiting PCM capabilities Covers the work of well-known authors and researchers in the field Includes volumes that are devoted to single themes or subfields of computer science

3D integration is an emerging technology for the design of many-core microprocessors and memory integration. This book, Advances in 3D Integrated Circuits and Systems, is written to help readers understand 3D integrated circuits in three stages: device basics, system level management, and real designs.Contents presented in this book include fabrication techniques for 3D TSV and 2.5D TSI; device modeling; physical designs; thermal, power and I/O management; and 3D designs of sensors, I/Os, multi-core processors, and memory.Advanced undergraduates, graduate students, researchers and engineers may find this text useful for understanding the many challenges faced in the development and building of 3D integrated circuits and systems.

Explains current co-design and co-optimization methodologies for building hardware neural networks and algorithms for machine learning applications This book focuses on how to build energy-efficient hardware for neural networks with learning capabilities—and provides co-design and co-optimization methodologies for building hardware neural networks that can learn. Presenting a complete picture from high-level algorithm to low-level implementation details, Learning in Energy-Efficient Neuromorphic Computing: Algorithm and Architecture Co-Design also covers many fundamentals and essentials in neural networks (e.g., deep learning), as well as hardware implementation of neural networks. The book begins with an overview of neural networks. It then discusses algorithms for utilizing and training rate-based artificial neural networks. Next comes an introduction to various options for executing neural networks, ranging from general-purpose processors to specialized hardware, from digital accelerator to analog accelerator. A design example on building energy-efficient accelerator for adaptive dynamic programming with neural networks is also presented. An examination of fundamental concepts and popular learning algorithms for spiking neural networks follows that, along with a look at the hardware for spiking neural networks. Then comes a chapter offering readers three design examples (two of which are based on conventional CMOS, and one on emerging nanotechnology) to implement the learning algorithm found in the previous chapter. The book concludes with an outlook on the future of neural network hardware. Includes cross-layer survey of hardware accelerators for neuromorphic algorithms Covers the co-design of architecture and algorithms with emerging devices for much-improved computing efficiency Focuses on the co-design of algorithms and hardware, which is especially critical for using emerging devices, such as traditional memristors or diffusive memristors, for neuromorphic computing Learning in Energy-Efficient Neuromorphic Computing: Algorithm and Architecture Co-Design is an ideal resource for researchers, scientists, software engineers, and hardware engineers dealing with the ever-increasing requirement on power consumption and response time. It is also excellent for teaching and training undergraduate and graduate students about the latest generation neural networks with powerful learning capabilities.