Ghost Hardware

From the author of Infinite Detail, The Guardian's Pick for Best Science Fiction Book of 2019! Three short stories set in the near-future dystopia of Infinite Detail After an act of anonymous cyberterrorism has permanently switched off the internet, causing global trade, travel, and communication to collapse and modern luxuries to become scarce, life in the Croft and beyond . . . carries on. In “Ghost Hardware,” we meet Anika, an artist who uses VR to uncover layers of street art in pursuit of the work of another elusive artist. In a desolate future, she is chasing the past. “Limited Edition” takes us to a time before the crash to introduce us to Grids, College, and Melody—a tight-knit, sneaker-obsessed South Bristol crew. When a new pair of limited-edition trainers drops, they won't let a little thing like being broke get in their way—even if they have to do some VR hacking to pull off an IRL heist. And in the pre-internet-crash world of “Gulls” we meet Mary, who lives in the Tip, where Gulls like her dig through landfills in search of treasure. But Mary wants out. And the strange, glowing pair of glasses she found in a dead man’s jacket pocket just might be her ticket. Expanding on Tim Maughan’s vision of a world disconnected in Infinite Detail, the stories in Ghost Hardware give a closer look at the End of the Internet, the End of the World as We Know It.

This open access book constitutes the thoroughly refereed proceedings of the First International ISCIS Security Workshop 2018, Euro-CYBERSEC 2018, held in London, UK, in February 2018. The 12 full papers presented together with an overview paper were carefully reviewed and selected from 31 submissions. Security of distributed interconnected systems, software systems, and the Internet of Things has become a crucial aspect of the performance of computer systems. The papers deal with these issues, with a specific focus on societally critical systems such as health informatics systems, the Internet of Things, energy systems, digital cities, digital economy, mobile networks, and the underlying physical and network infrastructures.

This work is building on results from the book named “A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness” by M. Kovalev, S.M. Müller, and W.J. Paul, published as LNCS 9000 in 2014. It presents, at the gate level, construction and correctness proof of a multi-core machine with pipelined processors and extensive operating system support with the following features: • MIPS instruction set architecture (ISA) for application and for system programming • cache coherent memory system • store buffers in front of the data caches • interrupts and exceptions • memory management units (MMUs) • pipelined processors: the classical five-stage pipeline is extended by two pipeline stages for address translation • local interrupt controller (ICs) supporting inter-processor interrupts (IPIs) • I/O-interrupt controller and a disk

This volume contains the proceedings of the 4th International Conference on Verified Software: Theories, Tools, and Experiments, VSTTE 2012, held in Philadelphia, PA, USA, in January 2012. The 20 revised full papers presented together with 2 invited talks and 2 tutorials were carefully revised and selected from 54 initial submissions for inclusion in the book. The goal of the VSTTE conference is to advance the state of the art through the interaction of theory development, tool evolution, and experimental validation. The papers address topics such as: specification and verification techniques, tool support for specification languages, tool for various design methodologies, tool integration and plug-ins, automation in formal verification, tool comparisons and benchmark repositories, combination of tools and techniques, customizing tools for particular applications, challenge problems, refinement methodologies, requirements modeling, specification languages, specification/verification case-studies, software design methods, and program logic.

This book constitutes the refereed proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems, CHES'99, held in Worcester, MA, USA in August 1999. The 27 revised papers presented together with three invited contributions were carefully reviewed and selected from 42 submissions. The papers are organized in sections on cryptographic hardware, hardware architectures, smartcards and embedded systems, arithmetic algorithms, power attacks, true random numbers, cryptographic algorithms on FPGAs, elliptic curve implementations, new cryptographic schemes and modes of operation.

This book constitutes the refereed proceedings of the 28th International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2008, held in Hamburg, Germany, in September 2009. The 25 full papers presented together with two invited talks were carefully reviewed and selected from 72 submissions. The papers are organized in topical sections on medical systems, industrial experience, security risk analysis, safety guidelines, automotive, aerospace, verification, valdidation, test, fault tolerance, dependability.

This book constitutes the refereed proceedings of the 6th International workshop on Cryptographic Hardware and Embedded Systems, CHES 2004, held in Cambridge, MA, USA in August 2004. The 32 revised full papers presented were carefully reviewed and selected from 125 submissions. The papers are organized in topical sections on side channels, modular multiplication, low resources, implementation aspects, collision attacks, fault attacks, hardware implementation, and authentication and signatures.