Nano Interconnect Materials And Models For Next Generation Integrated Circuit Design

Aggressive scaling of device and interconnect dimensions has resulted in many low dimensional issues in the nanometer regime. This book deals with various new generation interconnect materials and interconnect modeling and highlights the significance of novel nano interconnect materials for 3D integrated circuit design. It provides information about advanced nanomaterials like carbon nanotube (CNT) and graphene nanoribbon (GNR) for the realization of interconnects, interconnect models, and crosstalk noise analysis. Features: Focusses on materials and nanomaterials utilization in next generation interconnects based on Carbon nanotubes (CNT) and Graphene nanoribbons (GNR). Helps readers realize interconnects, interconnect models, and crosstalk noise analysis. Describes Hybrid CNT and GNR based interconnects. Presents the details of power supply voltage drop analysis in CNT and GNR interconnects. Overviews pertinent RF performance and stability analysis. This book is aimed at graduate students and researchers in electrical and materials engineering, nano/microelectronics.

This textbook comprehensively covers on-chip interconnect dimension and application of carbon nanomaterials for modeling VLSI interconnect and buffer circuits. It provides analysis of ultra-low power high speed nano-interconnects based on different facets such as material modeling, circuit modeling and the adoption of repeater insertion strategies and measurement techniques. It covers important topics including on-chip interconnects, interconnect modeling, electrical impedance modeling of on-chip interconnects, modeling of repeater buffer and variability analysis. Pedagogical features including solved problems and unsolved exercises are interspersed throughout the text for better understanding. Aimed at senior undergraduate and graduate students in the field of electrical engineering, electronics and communications engineering for courses on Advanced VLSI Interconnects/Advanced VLSI Design/VLSI Interconnects/VLSI Design Automation and Techniques, this book: Provides comprehensive coverage of fundamental concepts related to nanotube transistors and interconnects. Discusses properties and performance of practical nanotube devices and related applications. Covers physical and electrical phenomena of carbon nanotubes, as well as applications enabled by this nanotechnology. Discusses the structure, properties, and characteristics of graphene-based on-chip interconnect. Examines interconnect power and interconnect delay issues arising due to downscaling of device size.

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017. The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

Although existing nanometer CMOS technology is expected to remain dominant for the next decade, new non-classical devices are being developed as the potential replacements of silicon CMOS, in order to meet the ever-present demand for faster, smaller, more efficient integrate circuits. Many new devices are based on novel emerging materials such as one-dimensional carbon nanotubes and two-dimensional graphene, non-graphene two-dimensional materials, and transition metal dichalcogenides. Such devices use on/off operations based on quantum mechanical current transport, and so their design and fabrication require an understanding of the electronic structures of materials and technologies. Moreover, new electronic design automation (EDA) tools and techniques need to be developed based on integrating devices from emerging novel material-based technologies. The aim of this book is to explore the materials and design requirements of these emerging integrated circuit technologies, and to outline their prospective applications. It will be useful for academics and research scientists interested in future directions and developments in design, materials and applications of novel integrated circuit technologies, and for research and development professionals working at the cutting edge of integrated circuit development.

This cutting-edge book on off-chip technologies puts the hottest breakthroughs in high-density compliant electrical interconnects, nanophotonics, and microfluidics at your fingertips, integrating the full range of mathematics, physics, and technology issues together in a single comprehensive source. You get full details on state-of-the-art I/O interconnects and packaging, including mechanically compliant I/O approaches, fabrication, and assembly, followed by the latest advances and applications in power delivery design, analysis, and modeling. The book explores interconnect structures, materials, and packages for achieving high-bandwidth off-chip electrical communication, including optical interconnects and chip-to-chip signaling approaches, and brings you up to speed on CMOS integrated optical devices, 3D integration, wafer stacking technology, and through-wafer interconnects.

This contributed book provides a thorough understanding of the basics along with detailed state-of-the-art emerging interconnect technologies for integrated circuit design and flexible electronics. It focuses on the investigation of advanced on-chip interconnects which match the current as well as future technology requirements. The contents focus on different aspects of interconnects such as material, physical characteristics, parasitic extraction, design, structure, modeling, machine learning, and neural network-based models for interconnects, signaling schemes, varying signal integrity performance analysis, variability, reliability aspects, associated electronic design automation tools. The book also explores interconnect technologies for flexible electronic systems. It also highlights the integration of sensors with stretchable interconnects to demonstrate the concept of a stretchable sensing network for wearable and flexible applications. This book is a useful guide for those working in academia and industry to understand the fundamentals and application of interconnect technologies.

The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the MLGNR while taking into account the edge roughness.

This book is about large-scale electronic circuits design driven by nanotechnology, where nanotechnology is broadly defined as building circuits using nanoscale devices that are either implemented with nanomaterials (e.g., nanotubes or nanowires) or following an unconventional method (e.g., FinFET or III/V compound-based devices). These nanoscale devices have significant potential to revolutionize the fabrication and integration of electronic systems and scale beyond the perceived scaling limitations of traditional CMOS. While innovations in nanotechnology originate at the individual device level, realizing the true impact of electronic systems demands that these device-level capabilities be translated into system-level benefits. This is the first book to focus on nanoscale circuits and their design issues, bridging the existing gap between nanodevice research and nanosystem design.