Enhanced Virtual Prototyping For Heterogeneous Systems

This book describes a comprehensive combination of methodologies that strongly enhance the modern Virtual Prototype (VP)-based verification flow for heterogeneous systems-on-chip (SOCs). In particular, the book combines verification and analysis aspects across various stages of the VP-based verification flow, providing a new perspective on verification by leveraging advanced techniques, like metamorphic testing, data flow testing, and information flow testing. In addition, the book puts a strong emphasis on advanced coverage-driven methodologies to verify the functional behavior of the SOC as well as ensure its security. Provides an extensive introduction to the modern VP-based verification flow for heterogeneous SOCs; Introduces a novel metamorphic testing technique for heterogeneous SOCs which does not require reference models; Includes automated advanced data flow coverage-driven methodologies tailored for SystemC/AMS-based VPs; Describes enhanced functional coverage-driven methodologies to verify various functional behaviors of RF amplifiers.

This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects.

The recent rise of "smart" products has been made possible through tight co-design of hardware and software. The growing amount of software and hence processors in applications all around us allows for increased flexibility in the application functionality through its life cycle. Not so long ago a device felt outdated after you owned it for a couple of months. Today, a continuous stream of new software applications and updates make products feel truly "smart". The result is an almost magical user experience where the same product can do more today than it could do yesterday.

In this book we dive deep into a key methodology to enable concurrent hardware/software development by decoupling the dependency of the software development from hardware availability: virtual prototyping. The ability to start software development much earlier in the design cycle drives a true "shift-left" of the entire product development schedule and results in better products that are available earlier in the market.

Throughout the book, case studies illustrate how virtual prototypes are being deployed by major companies around the world. If you are interested in a quick feel for what virtual prototyping has to offer for practical deployment, we recommend picking a few case studies to read, before diving into the details of the methodology.

Of course, this book can only offer a small snapshot of virtual prototype use cases for faster software development. However, as most software bring-up, debug and test principles are similar across markets and applications, it is not hard to realize why virtual prototypes are being leveraged whenever software is an intrinsic part of the product functionality, after reading this book.

This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects. Provides a comprehensive set of techniques to enhance all key aspects of a Virtual Prototype (VP)-based design flow Includes automated formal verification methods and advanced coverage-guided testing techniques, tailored for SystemC-based VPs Describes efficient, coverage-guided test generation methods for VP-based functional and non-functional software (SW) analysis and verification Includes correspondence analyses to utilize information between different abstraction levels in the design flow Uses several VP and SW verification case-studies that target the modern RISC-V ISA.

This book describes recent findings in the domain of Boolean logic and Boolean algebra, covering application domains in circuit and system design, but also basic research in mathematics and theoretical computer science. Content includes invited chapters and a selection of the best papers presented at the 15th annual International Workshop on Boolean Problems.

This book describes a set of SystemC‐based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process.

Develop, Deploy, and Sustain High-Performance Virtual Prototyping for Advanced R&D Organizations must reduce time-to-market, costs, and risks while producing higher-quality products that grow ever more complex. In response, many are turning to advanced software for rapidly creating and analyzing virtual prototypes, and accurately predicting the performance and behavior of the systems they represent. This requires a deep understanding of physics-based digital engineering and high-performance computing, as well as unique organizational and management skills. Now, Douglass Post and Richard Kendall bring together knowledge that engineers, scientists, developers, and managers will need to build, deploy, and sustain these specialized applications—including information previously available only in proprietary environments. Post and Kendall illuminate key issues with a detailed book-length case study based on their work at the U.S. DoD's pioneering Computational Research and Engineering Acquisition Tools and Environments (CREATE) program, which developed eleven of the field's most advanced software tools. You'll find a detailed roadmap for planning, organizing, managing, and navigating complex organizations to successful delivery; as well as detailed descriptions of each step in the process, with clear rationales and concrete examples. The authors share detailed references, a convenient glossary and bibliography, sidebars on overcoming real-world challenges, and more. The book reviews the essentials of computational engineering and science and the pivotal role of virtual prototyping. It helps readers to: Plan and manage the paradigm shift from physical to virtual prototyping Establish, execute, and evolve Agile processes for developing virtual prototyping software Understand and implement virtual prototyping tools and workflows Verify and validate prototyping systems to ensure accuracy and utility Recruit and retain a specialized workforce, and train and support users Explore additional emerging roles for virtual prototyping