High Speed Integrated Circuit Technology

This book reviews the state of the art of very high speed digital integrated circuits. Commercial applications are in fiber optic transmission systems operating at 10, 40, and 100 Gb/s, while the military application is ADCs and DACs for microwave radar. The book contains detailed descriptions of the design, fabrication, and performance of wideband Si/SiGe-, GaAs-, and InP-based bipolar transistors. The analysis, design, and performance of high speed CMOS, silicon bipolar, and III-V digital ICs are presented in detail, with emphasis on application in optical fiber transmission and mixed signal ICs. The underlying physics and circuit design of rapid single flux quantum (RSFQ) superconducting logic circuits are reviewed, and there is extensive coverage of recent integrated circuit results in this technology. Contents: Preface (M J W Rodwell); High-Speed and High-Data-Bandwidth Transmitter and Receiver for Multi-Channel Serial Data Communication with CMOS Technology (M Fukaishi et al.); High-Performance Si and SiGe Bipolar Technologies and Circuits (M Wurzer et al.); Self-Aligned Si BJT/SiGe HBT Technology and Its Application to High-Speed Circuits (K Washio); Small-Scale InGaP/GaAs Heterojunction Bipolar Transistors for High-Speed and Low-Power Integrated-Circuit Applications (T Oka et al.); Prospects of InP-Based IC Technologies for 100-Gbit/S-Class Lightwave Communications Systems (T Enoki et al.); Scaling of InGaAs/InAlAs HBTs for High Speed Mixed-Signal and mm-Wave ICs (M J W Rodwell); Progress Toward 100 GHz Logic in InP HBT IC Technology (C H Fields et al.); Cantilevered Base InP DHBT for High Speed Digital Applications (A L Gutierrez-Aitken et al.); RSFQ Technology: Physics and Devices (P Bunyk et al.); RSFQ Technology: Circuits and Systems (D K Brock). Readership: Researchers, industrialists and academics in electrical and electronic engineering.

MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible. The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O. Contents: Achieving Analog Accuracy in Nanometer CMOS (M P Flynn et al.); Self-Induced Noise in Integrated Circuits (R Gharpurey & S Naraghi); High-Speed Oversampling Analog-to-Digital Converters (A Gharbiya et al.); Designing LC VCOs Using Capacitive Degeneration Techniques (B Jung & R Harjani); Fully Integrated Frequency Synthesizers: A Tutorial (S T Moon et al.); Recent Advances and Design Trends in CMOS Radio Frequency Integrated Circuits (D J Allstot et al.); Equalizers for High-Speed Serial Links (P K Hanumolu et al.); Low-Power, Parallel Interface with Continuous-Time Adaptive Passive Equalizer and Crosstalk Cancellation (C P Yue et al.). Readership: Technologists, scientists, and engineers in the field of high-speed communication circuits. It can also be used as a textbook for graduate and advanced undergraduate courses.

The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuits is full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. emOn-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.

This book explores up-to-date research trends and achievements on low-power and high-speed technologies in both electronics and optics. It offers unique insight into low-power and high-speed approaches ranging from devices, ICs, sub-systems and networks that can be exploited for future mobile devices, 5G networks, Internet of Things (IoT), and data centers. It collects heterogeneous topics in place to catch and predict future research directions of devices, circuits, subsystems, and networks for low-power and higher-speed technologies. Even it handles about artificial intelligence (AI) showing examples how AI technology can be combined with concurrent electronics. Written by top international experts in both industry and academia, the book discusses new devices, such as Si-on-chip laser, interconnections using graphenes, machine learning combined with CMOS technology, progresses of SiGe devices for higher-speed electronices for optic, co-design low-power and high-speed circuits for optical interconnect, low-power network-on-chip (NoC) router, X-ray quantum counting, and a design of low-power power amplifiers. Covers modern high-speed and low-power electronics and photonics. Discusses novel nano-devices, electronics & photonic sub-systems for high-speed and low-power systems, and many other emerging technologies like Si photonic technology, Si-on-chip laser, low-power driver for optic device, and network-on-chip router. Includes practical applications and recent results with respect to emerging low-power systems. Addresses the future perspective of silicon photonics as a low-power interconnections and communication applications.

High speed circuits are crucial for increasing the bandwidth of transmission and switching of voice/video/data over optical fiber networks. The ever-increasing demand for bit rates higher than those available due to the explosion of Internet traffic has driven engineers to develop integrated circuits of performance approaching 100 Gb/s. Commercial lightwave products using high speed circuits of 10 Gb/s and beyond are readily available.High Speed Circuits for Lightwave Communications presents the latest information on circuit design, measured results, applications, and product development. It covers electronic and opto-electronic circuits for transmission, receiving, and cross-point switching. These circuits were implemented with various state-of-the-art IC technologies, including Si BJT, GaAs MESFET, HEMT, HBT, as well as InP HEMT and HBT. The book, written by more than 50 experts, will benefit graduate students, researchers, and engineers who are interested in or work in this exciting and challenging field of optical communications.

The latest techniques for designing robust, high performance integrated circuits in nanoscale technologies Focusing on a new technological paradigm, this practical guide describes the interconnect-centric design methodologies that are now the major focus of nanoscale integrated circuits (ICs). High Performance Integrated Circuit Design begins by discussing the dominant role of on-chip interconnects and provides an overview of technology scaling. The book goes on to cover data signaling, power management, synchronization, and substrate-aware design. Specific design constraints and methodologies unique to each type of interconnect are addressed. This comprehensive volume also explains the design of specialized circuits such as tapered buffers and repeaters for data signaling, voltage regulators for power management, and phase-locked loops for synchronization. This is an invaluable resource for students, researchers, and engineers working in the area of high performance ICs. Coverage includes: Technology scaling Interconnect modeling and extraction Signal propagation and delay analysis Interconnect coupling noise Global signaling Power generation Power distribution networks CAD of power networks Techniques to reduce power supply noise Power dissipation Synchronization theory and tradeoffs Synchronous system characteristics On-chip clock generation and distribution Substrate noise in mixed-signal ICs Techniques to reduce substrate noise