Microelectronic Interconnections And Assembly

MICROELECTRONIC INTERCONNECTIONS AND MICROASSEMBL Y WORKSHOP 18-21 May 1996, Prague, Czech Republic Conference Organizers: George Harman, NIST (USA) and Pavel Mach (Czech Republic) Summary of the Technical Program Thirty two presentations were given in eight technical sessions at the Workshop. A list of these sessions and their chairpersons is attached below. The Workshop was devoted to the technical aspects of advanced interconnections and microassembly, but also included papers on the education issues required to prepare students to work in these areas. In addition to new technical developments, several papers presented overviews predicting the future directions of these technologies. The basic issue is that electronic systems will continue to be miniaturized and at the same time performance must continue to improve. Various industry roadmaps were discussed as well as new smaller packaging and interconnection concepts. The newest chip packages are often based on the selection of an appropriate interconnection method. An example is the chip-scale package, which has horizontal (x-y) dimensions,;; 20% larger than the actual silicon chip itself. The chip is often flip-chip connected to a micro ball-grid-array, but direct chip attach was described also. Several papers described advances in the manufacture of such packages.

Reviewing the various IC packaging, assembly, and interconnection technologies, this professional reference provides an overview of the materials and the processes, as well as the trends and available options that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC. The book discusses the various packaging approaches, assembly options, and essential manufacturing technologies, among other relevant topics.

This reference provides a complete discussion of the conversion from standard lead-tin to lead-free solder microelectronic assemblies for low-end and high-end applications. Written by more than 45 world-class researchers and practitioners, the book discusses general reliability issues concerning microelectronic assemblies, as well as factors specific to the tin-rich replacement alloys commonly utilized in lead-free solders. It provides real-world manufacturing accounts of the introduction of reduced-lead and lead-free technology and discusses the functionality and cost effectiveness of alternative solder alloys and non-solder alternatives replacing lead-tin solders in microelectronics.

Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.

Robust Design of Microelectronics Assemblies Against Mechanical Shock, Temperature and Moisture discusses how the reliability of packaging components is a prime concern to electronics manufacturers. The text presents a thorough review of this important field of research, providing users with a practical guide that discusses theoretical aspects, experimental results, and modeling techniques. The authors use their extensive experience to produce detailed chapters covering temperature, moisture, and mechanical shock induced failure, adhesive interconnects, and viscoelasticity. Useful program files and macros are also included. Discusses how the reliability of packaging components is a prime concern to electronics manufacturers Presents a thorough review of this important field of research, providing users with a practical guide that discusses theoretical aspects, experimental results, and modeling techniques Includes program files and macros for additional study

Microelectronic system interconnections provides a uniques approach to the subject.

Reviewing the various IC packaging, assembly, and interconnection technologies, this professional reference provides an overview of the materials and the processes, as well as the trends and available options that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC. The book discusses the various packaging approaches, assembly options, and essential manufacturing technologies, among other relevant topics.