Substrate Noise Coupling In Mixed Signal Asics

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.

The book reports modeling and simulation techniques for substrate noise coupling effects in RFICs and introduces isolation structures and design guides to mitigate such effects with the ultimate goal of enhancing the yield of RF and mixed signal SoCs. The book further reports silicon measurements, and new test and noise isolation structures. To the authors’ knowledge, this is the first title devoted to the topic of substrate noise coupling in RFICs as part of a large SoC.

Noise Coupling is the root-cause of the majority of Systems on Chip (SoC) product fails. The book discusses a breakthrough substrate coupling analysis flow and modelling toolset, addressing the needs of the design community. The flow provides capability to analyze noise components, propagating through the substrate, the parasitic interconnects and the package. Using this book, the reader can analyze and avoid complex noise coupling that degrades RF and mixed signal design performance, while reducing the need for conservative design practices. With chapters written by leading international experts in the field, novel methodologies are provided to identify noise coupling in silicon. It additionally features case studies that can be found in any modern CMOS SoC product for mobile communications, automotive applications and readout front ends.

Modern microelectronic design is characterized by the integration of full systems on a single die. These systems often include large high performance digital circuitry, high resolution analog parts, high driving I/O, and maybe RF sections. Designers of such systems are constantly faced with the challenge to achieve compatibility in electrical characteristics of every section: some circuitry presents fast transients and large consumption spikes, whereas others require quiet environments to achieve resolutions well beyond millivolts. Coupling between those sections is usually unavoidable, since the entire system shares the same silicon substrate bulk and the same package. Understanding the way coupling is produced, and knowing methods to isolate coupled circuitry, and how to apply every method, is then mandatory knowledge for every IC designer. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an in-depth look at coupling through the common silicon substrate, and noise at the power supply lines. It explains the elementary knowledge needed to understand these phenomena and presents a review of previous works and new research results. The aim is to provide an understanding of the reasons for these particular ways of coupling, review and suggest solutions to noise coupling, and provide criteria to apply noise reduction. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an ideal book, both as introductory material to noise-coupling problems in mixed-signal ICs, and for more advanced designers facing this problem.

In the past decade, substrate noise has had a constant and significant impact on the design of analog and mixed-signal integrated circuits. Only recently, with advances in chip miniaturization and innovative circuit design, has substrate noise begun to plague fully digital circuits as well. To combat the effects of substrate noise, heavily over-designed structures are generally adopted, thus seriously limiting the advantages of innovative technologies. Substrate Noise: Analysis and Optimization for IC Design addresses the main problems posed by substrate noise from both an IC and a CAD designer perspective. The effects of substrate noise on performance in digital, analog, and mixed-signal circuits are presented, along with the mechanisms underlying noise generation, injection, and transport. Popular solutions to the substrate noise problem and the trade-offs often debated by designers are extensively discussed. Non-traditional approaches as well as semi-automated techniques to combat substrate noise are also addressed. Substrate Noise: Analysis and Optimization for IC Design will be of interest to researchers and professionals interested in signal integrity, as well as to mixed signal and RF designers.

This book presents case studies to illustrate that careful modeling of the assembly characteristics and layout details is required to bring simulations and measurements into agreement. Engineers learn how to use a proper combination of isolation structures and circuit techniques to make analog/RF circuits more immune to substrate noise. Topics include substrate noise propagation, passive isolation structures, noise couple in active devices, measuring the coupling mechanisms in analog/RF circuits, prediction of the impact of substrate noise on analog/RF circuits, and noise coupling in analog/RF systems.

"...offers a tutorial guide to IC designers who want to move to the next level of chip design by unlocking the secrets of signal integrity." —Jake Buurma, Senior Vice President, Worldwide Research & Development, Cadence Design Systems, Inc. Covers signal integrity effects in high performance Radio Frequency (RF) IC Brings together research papers from the past few years that address the broad range of issues faced by IC designers and CAD managers now and in the future A Wiley-IEEE Press publication

This book brings together innovative modelling, simulation and design techniques in CMOS, SOI, GaAs and BJT to achieve successful high-yield manufacture for low-power, high-speed and reliable-by-design analogue and mixed-mode integrated systems.