System Level Modelling And Design Space Exploration For Multiprocessor Embedded System On Chip Architectures

Modern embedded systems come with contradictory design constraints. On one hand, these systems often target mass production and battery-based devices, and therefore should be cheap and power efficient. On the other hand, they still need to show high (sometimes real-time) performance, and often support multiple applications and standards which requires high programmability. This wide spectrum of design requirements leads to complex heterogeneous System-on-Chip (SoC) architectures -- consisting of several types of processors from fully programmable microprocessors to configurable processing cores and customized hardware components, integrated on a single chip. This study targets such multiprocessor embedded systems and strives to develop algorithms, methods, and tools to deal with a number of fundamental problems which are encountered by the system designers during the early design stages.

This book gives a comprehensive introduction to the design challenges of MPSoC platforms, focusing on early design space exploration. It defines an iterative methodology to increase the abstraction level so that evaluation of design decisions can be performed earlier in the design process. These techniques enable exploration on the system level before undertaking time- and cost-intensive development.

This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.

Modern electronic systems consist of a fairly heterogeneous set of components. Today, a single system can be constituted by a hardware platform, frequently composed of a mix of analog and digital components, and by several software application layers. The hardware can include several heterogeneous microprocessors (e.g. GPP, DSP, GPU, etc.), dedicated ICs (ASICs and/or FPGAs), memories, a set of local connections between the system components, and some interfaces between the system and the environment (sensors, actuators, etc.). Therefore, on the one hand, multi-processor embedded systems are capable of meeting the demand of processing power and flexibility of complex applications. On the other hand, such systems are very complex to design and optimize, so that the design methodology plays a major role in determining the success of the products. For these reasons, to cope with the increasing system complexity, the approaches typically used today are oriented towards co-design methodologies working at the higher levels of abstraction. Unfortunately, such methodologies are typically customized for the specific application, suffer of a lack of generality and still need a considerable effort when real-size project are envisioned. Therefore, there is still the need for a general methodology able to support the designer during the high-level steps of a co-design flow, enabling an effective design space exploration before tackling the low-level steps and thus committing to the final technology. This should prevent costly redesign loops. In such a context, the work described in this book, composed of two parts, aims at providing models, methodologies and tools to support each step of the co-design flow of embedded systems implemented by exploiting heterogeneous multi-processor architectures mapped on distributed systems, as well as fully integrated onto a single chip. The first part focuses on issues like the analysis of system specification languages, and the analysis of existing system-level HW/SW co-simulation methodologies to support heterogeneous multi-processor architectures. The second part focuses mainly on Design Space Exploration, and it presents both some theoretical advancements with respect to the first part, and the development of a prototypal framework that provides practical exploitation of the proposed concepts.

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

This book constitutes the refereed proceedings of the 20th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2020, held in Samos, Greece, in July 2020.* The 16 regular papers presented were carefully reviewed and selected from 35 submissions. In addition, 9 papers from two special sessions were included, which were organized on topics of current interest: innovative architectures for security and European projects on embedded and high performance computing for health applications. * The conference was held virtually due to the COVID-19 pandemic.

This book presents the technical program of the International Embedded Systems Symposium (IESS) 2009. Timely topics, techniques and trends in embedded system design are covered by the chapters in this volume, including modelling, simulation, verification, test, scheduling, platforms and processors. Particular emphasis is paid to automotive systems and wireless sensor networks. Sets of actual case studies in the area of embedded system design are also included. Over recent years, embedded systems have gained an enormous amount of proce- ing power and functionality and now enter numerous application areas, due to the fact that many of the formerly external components can now be integrated into a single System-on-Chip. This tendency has resulted in a dramatic reduction in the size and cost of embedded systems. As a unique technology, the design of embedded systems is an essential element of many innovations. Embedded systems meet their performance goals, including real-time constraints, through a combination of special-purpose hardware and software components tailored to the system requirements. Both the development of new features and the reuse of existing intellectual property components are essential to keeping up with ever more demanding customer requirements. Furthermore, design complexities are steadily growing with an increasing number of components that have to cooperate properly. Embedded system designers have to cope with multiple goals and constraints simul- neously, including timing, power, reliability, dependability, maintenance, packaging and, last but not least, price.