Oblivious Network Routing

Versatile solutions to routing network flows in unpredictable circumstances, presenting both mathematical tools and applications. Our increasingly integrated world relies on networks both physical and virtual to transfer goods and information. The Internet is a network of networks that connects people around the world in a real-time manner, but it can be disrupted by massive data flows, diverse traffic patterns, inadequate infrastructure, and even natural disasters and political conflict. Similar challenges exist for transportation and energy distribution networks. There is an urgent need for intelligent and adaptable routing of network flows, and a rich literature has evolved that treats “oblivious network design.” This book offers novel computational schemes for efficiently solving routing problems in unpredictable circumstances and proposes some real world applications for them. The versatile routing schemes mathematically guarantee long-term efficiency and are most appropriate for networks with non-deterministic (or oblivious) current and past states. After an introduction to network design and the importance of routing problems, the book presents mathematical tools needed to construct versatile routing schemes, emphasizing the role of linked hierarchical data structures, both top-down and bottom-up. It then describes two important applications of versatile routing schemes: a secure model for congestion-free content-centric networks (which will play a key role in the future of the Internet) and a novel approach for the distribution of green power resources on a smart electricity grid.

This book constitutes the refereed proceedings of the 10th International Teletraffic Congress, ITC 2007, held in Ottawa, Canada, June 2007. Coverage includes IPTV planning and modeling, network performance, traffic engineering, end-to-end delay in converged networks, queuing models, impact of convergence and divergence forces on network performance, traffic management in wireless networks, and network design for capacity and performance.

This report is concerned with routing protocols in networks. The major result is a low bound for any oblivious routing strategy where the route of a packet depends only on the source and destination of the packet. We show that for any oblivious routing protocol for a network of n processors in which the maximum number of processors directly connected to any processor is d, there exists a permutation that requires time (sq. root of n) d (to the 3/2). For specific networks such as an n-cube we give an oblivious routing algorithm whose performance is close to this lower bound. (Author).

This book presents the history and state of the art of universal routing strategies, which can be applied to networks independently of their respective topologies. It opens with a self-contained introduction, accessible also to newcomers. The main original results are new universal network protocols for store-and-forward and wormhole routing with small buffers or without buffers; these results are presented in detail and their potential applications are discussed. The book ends with a summary of open problems and an outlook of future directions in the area of routing theory.

This book introduces different interconnection networks applied to different systems. Interconnection networks are used to communicate processing units in a multi-processor system, routers in communication networks, and servers in data centers. Queuing techniques are applied to interconnection networks to support a higher utilization of resources. There are different queuing strategies, and these determine not only the performance of the interconnection network, but also the set of requirements to make them work effectively and their cost. Routing algorithms are used to find routes to destinations and directions in what information travels. Additional properties, such as avoiding deadlocks and congestion, are sought. Effective routing algorithms need to be paired up with these networks. The book will introduce the most relevant interconnection networks, queuing strategies, and routing algorithm. It discusses their properties and how these leverage the performance of the whole interconnection system. In addition, the book covers additional topics for memory management and congestion avoidance, used to extract higher performance from the interconnection network.

This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Conference on Heterogeneous Networking for Quality, Reliability, Security and Robustness, QShine 2010. The 37 revised full papers presented along with 7 papers from the allocated Dedicated Short Range Communications Workshop, DSRC 2010, were carefully selected from numerous submissions. Conference papers are organized into 9 technical sessions, covering the topics of cognitive radio networks, security, resource allocation, wireless protocols and algorithms, advanced networking systems, sensor networks, scheduling and optimization, routing protocols, multimedia and stream processing. Workshop papers are organized into two sessions: DSRC networks and DSRC security.

Wireless ad hoc sensor networks has recently become a very active research subject. Achieving efficient, fault-tolerant realizations of very large, highly dynamic, complex, unconventional networks is a real challenge for abstract modelling, algorithmic design and analysis, but a solid foundational and theoretical background seems to be lacking. This book presents high-quality contributions by leading experts worldwide on the key algorithmic and complexity-theoretic aspects of wireless sensor networks. The intended audience includes researchers and graduate students working on sensor networks, and the broader areas of wireless networking and distributed computing, as well as practitioners in the relevant application areas. The book can also serve as a text for advanced courses and seminars.

With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions