Nanoscale Silicon Devices

Is Bigger Always Better? Explore the Behavior of Very Small Devices as Described by Quantum Mechanics Smaller is better when it comes to the semiconductor transistor. Nanoscale Silicon Devices examines the growth of semiconductor device miniaturization and related advances in material, device, circuit, and system design, and highlights the use of device scaling within the semiconductor industry. Device scaling, the practice of continuously scaling down the size of metal-oxide-semiconductor field-effect transistors (MOSFETs), has significantly improved the performance of small computers, mobile phones, and similar devices. The practice has resulted in smaller delay time and higher device density in a chip without an increase in power consumption. This book covers recent advancements and considers the future prospects of nanoscale silicon (Si) devices. It provides an introduction to new concepts (including variability in scaled MOSFETs, thermal effects, spintronics-based nonvolatile computing systems, spin-based qubits, magnetoelectric devices, NEMS devices, tunnel FETs, dopant engineering, and single-electron transfer), new materials (such as high-k dielectrics and germanium), and new device structures in three dimensions. It covers the fundamentals of such devices, describes the physics and modeling of these devices, and advocates further device scaling and minimization of energy consumption in future large-scale integrated circuits (VLSI). Additional coverage includes: Physics of nm scaled devices in terms of quantum mechanics Advanced 3D transistors: tri-gate structure and thermal effects Variability in scaled MOSFET Spintronics on Si platform NEMS devices for switching, memory, and sensor applications The concept of ballistic transport The present status of the transistor variability and more An indispensable resource, Nanoscale Silicon Devices serves device engineers and academic researchers (including graduate students) in the fields of electron devices, solid-state physics, and nanotechnology.

Anticipating a limit to the continuous miniaturization (More-Moore), intense research efforts are being made to co-integrate various functionalities (More-than-Moore) in a single chip. Currently, strain engineering is the main technique used to enhance the performance of advanced semiconductor devices. Written from an engineering applications standpoint, this book encompasses broad areas of semiconductor devices involving the design, simulation, and analysis of Si, heterostructure silicongermanium (SiGe), and III-N compound semiconductor devices. The book provides the background and physical insight needed to understand the new and future developments in the technology CAD (TCAD) design at the nanoscale. Features Covers stressstrain engineering in semiconductor devices, such as FinFETs and III-V Nitride-based devices Includes comprehensive mobility model for strained substrates in global and local strain techniques and their implementation in device simulations Explains the development of strain/stress relationships and their effects on the band structures of strained substrates Uses design of experiments to find the optimum process conditions Illustrates the use of TCAD for modeling strain-engineered FinFETs for DC and AC performance predictions This book is for graduate students and researchers studying solid-state devices and materials, microelectronics, systems and controls, power electronics, nanomaterials, and electronic materials and devices.

Silicon Devices and Process Integration covers state-of-the-art silicon devices, their characteristics, and their interactions with process parameters. It serves as a comprehensive guide which addresses both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. The book is compiled from the author’s industrial and academic lecture notes and reflects years of experience in the development of silicon devices. Features include: A review of silicon properties which provides a foundation for understanding the device properties discussion, including mobility-enhancement by straining silicon; State-of-the-art technologies on high-K gate dielectrics, low-K dielectrics, Cu interconnects, and SiGe BiCMOS; CMOS-only applications, such as subthreshold current and parasitic latch-up; Advanced Enabling processes and process integration. This book is written for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

The primary advanced textbook for the teaching of science and engineering of nanoscale devices as used in the semiconductor, electronics, magnetics, optics and electromechanics industry.

To push MOSFETs to their scaling limits and to explore devices that may complement or even replace them at molecular scale, a clear understanding of device physics at nanometer scale is necessary. Nanoscale Transistors provides a description on the recent development of theory, modeling, and simulation of nanotransistors for electrical engineers, physicists, and chemists working on nanoscale devices. Simple physical pictures and semi-analytical models, which were validated by detailed numerical simulations, are provided for both evolutionary and revolutionary nanotransistors. After basic concepts are reviewed, the text summarizes the essentials of traditional semiconductor devices, digital circuits, and systems to supply a baseline against which new devices can be assessed. A nontraditional view of the MOSFET using concepts that are valid at nanoscale is developed and then applied to nanotube FET as an example of how to extend the concepts to revolutionary nanotransistors. This practical guide then explore the limits of devices by discussing conduction in single molecules

Circuits for Emerging Technologies Beyond CMOS New exciting opportunities are abounding in the field of body area networks, wireless communications, data networking, and optical imaging. In response to these developments, top-notch international experts in industry and academia present Circuits at the Nanoscale: Communications, Imaging, and Sensing. This volume, unique in both its scope and its focus, addresses the state-of-the-art in integrated circuit design in the context of emerging systems. A must for anyone serious about circuit design for future technologies, this book discusses emerging materials that can take system performance beyond standard CMOS. These include Silicon on Insulator (SOI), Silicon Germanium (SiGe), and Indium Phosphide (InP). Three-dimensional CMOS integration and co-integration with Microelectromechanical (MEMS) technology and radiation sensors are described as well. Topics in the book are divided into comprehensive sections on emerging design techniques, mixed-signal CMOS circuits, circuits for communications, and circuits for imaging and sensing. Dr. Krzysztof Iniewski is a director at CMOS Emerging Technologies, Inc., a consulting company in Vancouver, British Columbia. His current research interests are in VLSI ciruits for medical applications. He has published over 100 research papers in international journals and conferences, and he holds 18 international patents granted in the United States, Canada, France, Germany, and Japan. In this volume, he has assembled the contributions of over 60 world-reknown experts who are at the top of their field in the world of circuit design, advancing the bank of knowledge for all who work in this exciting and burgeoning area.

Technological advancement in chip development, primarily based on the downscaling of the feature size of transistors, is threatening to come to a standstill as we approach the limits of conventional scaling. For example, when the number of electrons in a device's active region is reduced to less than ten electrons (or holes), quantum fluctuation errors will occur, and when gate insulator thickness becomes too insignificant to block quantum mechanical tunneling, unacceptable leakage will occur. Fortunately, there is truth in the old adage that whenever a door closes, a window opens somewhere else. In this case, that window opening is nanotechnology. Silicon Nanoelectronics takes a look at at the recent development of novel devices and materials that hold great promise for the creation of still smaller and more powerful chips. Silicon nanodevices are positoned to be particularly relevant in consideration of the existing silicon process infrastructure already in place throughout the semiconductor industry and silicon's consequent compatibility with current CMOS circuits. This is reinforced by the nearly perfect interface that can exist between natural oxide and silicon. Presenting the contributions of more than 20 leading academic and corporate researchers from the United States and Japan, Silicon Nanoelectronics offers a comprehensive look at this emergent technology. The text includes extensive background information on the physics of silicon nanodevices and practical CMOS scaling. It considers such issues as quantum effects and ballistic transport and resonant tunneling in silicon nanotechnology. A significant amount of attention is given to the all-important silicon single electron transistors and the devices that utilize them. In offering an update of the current state-of-the-art in the field of silicon nanoelectronics, this volume serves well as a concise reference for students, scientists, engineers, and specialists in various fields, in